In the past (version 0.4 and earlier), the Doukutsu Assembler paled in comparison to OllyDbg because the Assembler was unable to compile a large percentage of all possible x86 instructions. I am glad to announce that the Assembler now supports an much larger number of instructions (and instruction variations) when compared to version 0.4. There are still some unsupported instructions lying around, most notably the floating-point instructions, but otherwise you should have an easier time dealing the capabilities of the Assembler as an ASM compiler.
(register) refers to any of the following integer registers: EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, AX, CX, DX, BX, SP, BP, SI, DI, AL, CL, DL, BL, AH, CH, DH, BH.
(memory) refers to a pointer dereference of any complexity, such as DWORD PTR DS:[EAX*4+EDX+40400A] or BYTE PTR SS:[EBP].
(immediate) refers to immediate data. This means any 8-bit, 16-bit, or 32-bit hexadecimal number.
(address) refers to a 32-bit hexadecimal address.
(dword) refers to a 32-bit hexadecimal number.
(word) refers to any 16-bit hexadecimal number.
(byte) refers to any 8-bit hexadecimal number.
xx means conditional instruction. Jxx means any type of conditional jump, such as JE, JNE, JGE, JLE, JG, JL, JP, JNP, and so on.
Remember you can use a label anywhere an address or 32-bit number can be used.
Exceptions may occur. For example, it is not possible to push an 8-bit register (try it in OllyDbg - it doesn't work), but PUSH (register) is still listed in the table. You have to assume that the variation PUSH (register) excludes 8-bit registers.
Instruction |
Stands for |
Supported? |
Variations Supported |
AAA |
ASCII adjust after addition |
Yes |
AAA = 0x37 |
AAD |
ASCII adjust AX before division |
Yes |
AAD = 0xD50A |
AAM |
ASCII adjust AX after multiply |
Yes |
AAM = 0xD40A |
AAS |
ASCII adjust AL after subtraction |
Yes |
AAS = 0x3F |
ADC |
Addition with carry |
Yes |
ADC (register),(register)
ADC (register),(memory)
ADC (memory),(register)
ADC (register),(immediate)
ADC (memory),(immediate)
|
ADD |
Addition |
Yes |
ADD (register),(register)
ADD (register),(memory)
ADD (memory),(register)
ADD (register),(immediate)
ADD (memory),(immediate)
|
AND |
Bitwise AND |
Yes |
AND (register),(register)
AND (register),(memory)
AND (memory),(register)
AND (register),(immediate)
AND (memory),(immediate)
|
ARPL |
Adjust RPL field of selector |
Yes |
ARPL (register),(register)
ARPL (memory),(register)
|
BOUND |
Check array bounds |
Yes |
BOUND (register),(memory)
|
BSF |
Bit scan forward |
Yes |
BSF (register),(register)
BSF (register),(memory)
|
BSR |
Bit scan reverse |
Yes |
BSR (register),(register)
BSR (register),(memory)
|
BT |
Bit test |
Yes |
BT (register),(register)
BT (memory),(register)
BT (register),(byte)
BT (memory),(byte)
|
BTC |
Bit test and complement |
Yes |
BTC (register),(register)
BTC (memory),(register)
BTC (register),(byte)
BTC (memory),(byte)
|
BTR |
Bit test and reset |
Yes |
BTR (register),(register)
BTR (memory),(register)
BTR (register),(byte)
BTR (memory),(byte)
|
BTS |
Bit test and set |
Yes |
BTS (register),(register)
BTS (memory),(register)
BTS (register),(byte)
BTS (memory),(byte)
|
BSWAP |
Byte swap |
Yes |
BSWAP (32-bit register) |
CALL |
Call procedure or function |
Yes |
CALL (address)
CALL (register)
CALL (memory) |
CBW |
Convert byte to word |
Yes |
CBW = 0x6698 |
CDQ |
Convert dword to qword |
Yes |
CDQ = 0x99 |
CLC |
Clear carry flag |
Yes |
CLC = 0xF8 |
CLD |
Clear direction flag |
Yes |
CLD = 0xFC |
CLI |
Clear interrupt flag |
Yes |
CLI = 0xFA |
CLTS |
Clear task-switched flag in CR0 |
Yes |
CLTS = 0x0F06 |
CMC |
Complement carry flag |
Yes |
CMC = 0xF5 |
CMOVxx |
Conditionally move data |
Yes |
CMOVxx (register),(register)
CMOVxx (register),(memory)
CMOVxx includes all of the following instructions:
CMOVE, CMOVZ, CMOVNE, CMOVNZ, CMOVLE, CMOVNG, CMOVGE, CMOVNL,
CMOVL, CMOVNGE, CMOVG, CMOVNLE, CMOVO, CMOVNO, CMOVS, CMOVNS,
CMOVNP, CMOVPO, CMOVP, CMOVPE, CMOVA, CMOVNBE, CMOVB, CMOVC,
CMOVNAE, CMOVBE, CMOVNA, CMOVNB, CMOVNC, and CMOVAE. |
CMP |
Compare |
Yes |
CMP (register),(register)
CMP (register),(memory)
CMP (memory),(register)
CMP (register),(immediate)
CMP (memory),(immediate)
|
CMPSD CMPSW CMPSB |
Compare strings |
Yes |
CMPSD = 0xA7
CMPSB = 0xA6
CMPSW = 0x66A7
|
CMPXCHG |
Compare & exchange |
Yes |
CMPXCHG (register),(register)
CMPXCHG (memory),(register) |
CMPXCHG8B |
Compare & exchange 8 bytes |
Yes |
CMPXCHG8B (memory)
CMPXCHG8B (register) |
CPUID |
CPU identification |
Yes |
CPUID = 0x0FA2 |
CWD |
Convert word to dword |
Yes |
CWD = 0x6699 |
CWDE |
Convert word to dword extended |
Yes |
CWDE = 0x98 |
DAA |
Decimal adjust AL after addition |
Yes |
DAA = 0x27 |
DAS |
Decimal adjust AL after subtraction |
Yes |
DAS = 0x2F |
DEC |
Decrement |
Yes |
DEC (register)
DEC (memory) |
DIV |
Unsigned division |
Yes |
DIV (register)
DIV (memory) |
ENTER |
Enter function |
Yes |
ENTER (word),(byte) |
FNOP |
Floating-point NOP |
Yes |
FNOP = 0xD9D0 |
HLT |
Halt |
Yes |
HLT = 0xF4 |
IDIV |
Signed division |
Yes |
IDIV (register)
IDIV (memory) |
IMUL |
Signed multiplication |
Yes |
IMUL (register)
IMUL (memory)
IMUL (register),(register)
IMUL (register),(memory)
IMUL (register),(register),(immediate)
IMUL (register),(memory),(immediate)
|
IN |
Input from port |
Partly |
IN (EAX,AX, or AL),(byte)
Not all variations of IN are supported. |
INSD INSW INSB |
Input from DX port |
Yes |
INSD = 0x6D
INSB = 0x6C
INSW = 0x666D
|
INC |
Increment |
Yes |
INC (register)
INC (memory) |
INT |
Interrupt |
Yes |
INT (byte) WARNING: INT 3 (with space) is not the same as INT3 (no space). You probably want INT3 instead of INT 3. |
INT3 |
Single-step interrupt |
Yes |
INT3 = 0xCC |
INTO |
Interrupt if overflow |
Yes |
INTO = 0xCE |
INVD |
Invalidate cache |
Yes |
INVD = 0x0F08 |
INVLPG |
Invalidate page |
Yes |
INVLPG (memory) |
IRETW IRETD |
Interrupt return |
Yes |
IRETW = 0x66CF IRETD = 0xCF |
Jxx |
Conditional jump |
Yes |
Jxx (address)
Jxx includes all of the following instructions:
JE, JZ, JNE, JNZ, JLE, JNG, JGE, JNL,
JL, JNGE, JG, JNLE, JO, JNO, JS, JNS,
JNP, JPO, JP, JPE, JA, JNBE, JB, JC,
JNAE, JBE, JNA, JNB, JNC, and JAE. |
JCXZ JECXZ |
Jump if CX / ECX is zero |
No |
N/A |
JMP |
Jump |
Yes |
JMP (address)
JMP (register)
JMP (memory) |
LAHF |
Load flags into AH |
Yes |
LAHF = 0x9F |
LAR |
Load access rights byte |
Yes |
LAR (register),(register)
LAR (register),(memory) |
LDS LES LFS LGS LSS |
Load pointer to DS / ES / FS / GS / SS |
Yes |
LDS (32-bit register),(memory)
LES (32-bit register),(memory)
LFS (32-bit register),(memory)
LGS (32-bit register),(memory)
LSS (32-bit register),(memory)
|
LEA |
Load effective address |
Yes |
LEA (register),(memory)
|
LEAVE |
Leave function |
Yes |
LEAVE = 0xC9 |
LGDT |
Load GDT register |
Yes |
LGDT (memory) |
LIDT |
Load IDT register |
Yes |
LIDT (memory) |
LLDT |
Load LDT register |
Yes |
LLDT (16-bit register)
LLDT (memory) |
LMSW |
Load machine status word |
Yes |
LMSW (16-bit register)
LMSW (memory) |
LODSD LODSW LODSB |
Load string |
Yes |
LODSD = 0xAD
LODSB = 0xAC
LODSW = 0x66AD
|
LOOP LOOPZ LOOPE LOOPNZ LOOPNE |
Looping instructions |
No |
N/A
Information: On most computers, using the looping instructions
to create a for-loop or a while-loop results in slower code than
writing these loops in terms of conditional jump statements. |
LSL |
Load segment limit |
Yes |
LSL (register),(register)
LSL (register),(memory)
|
LTR |
Load task register |
Yes |
LTR (16-bit register)
LTR (memory)
|
MOV |
Move data |
Yes |
MOV (register),(register)
MOV (register),(memory)
MOV (memory),(register)
MOV (register),(immediate)
MOV (memory),(immediate)
|
MOVSD MOVSW MOVSB |
Move string data |
Yes |
MOVSD = 0xA5
MOVSB = 0xA4
MOVSW = 0x66A5
|
MOVSX |
Move with sign-extend |
Yes |
MOVSX (register),(register)
MOVSX (register),(memory)
|
MOVZX |
Move with zero-extend |
Yes |
MOVZX (register),(register)
MOVZX (register),(memory)
|
MUL |
Unsigned multiply |
Yes |
MUL (register)
MUL (memory)
|
NEG |
Negate |
Yes |
NEG (register)
NEG (memory)
|
NOP |
No operation |
Yes |
NOP = 0x90 |
NOT |
Bitwise NOT |
Yes |
NOT (register)
NOT (memory)
|
OR |
Bitwise OR |
Yes |
OR (register),(register)
OR (register),(memory)
OR (memory),(register)
OR (register),(immediate)
OR (memory),(immediate)
|
OUT |
Output from port |
Partly |
OUT (byte),(EAX,AX, or AL)
Not all variations of OUT are supported. |
OUTSD OUTSW OUTSB |
Output from DX port |
Yes |
OUTSD = 0x6F
OUTSB = 0x6E
OUTSW = 0x666F
|
POP |
Pop stack |
Yes |
POP (register)
POP (memory)
|
POPAW POPAD |
Pop into all registers |
Yes |
POPAW = 0x6661
POPAD = 0x61
|
POPFW POPFD |
Pop into FLAGS or EFLAGS register |
Yes |
POPFW = 0x669D
POPFD = 0x9D
|
PUSH |
Push onto stack |
Yes |
PUSH (register)
PUSH (memory)
PUSH (immediate)
|
PUSHAW PUSHAD |
Push all registers |
Yes |
PUSHAW = 0x6660
PUSHAD = 0x60
|
PUSHFW PUSHFD |
Push FLAGS or EFLAGS register |
Yes |
PUSHFW = 0x669C
PUSHFD = 0x9C
|
RCL |
Rotate through carry left |
Yes |
RCL (register),(byte)
RCL (memory),(byte)
RCL (register),CL
RCL (memory),CL
|
RCR |
Rotate through carry right |
Yes |
RCR (register),(byte)
RCR (memory),(byte)
RCR (register),CL
RCR (memory),CL
|
RDMSR RDPMC RDTSC |
Read MSR Read PMC Read TSC |
Yes |
RDMSR = 0x0F32
RDPMC = 0x0F33
RDTSC = 0x0F31
|
RETN |
Return |
Yes |
RETN = 0xC3
|
RETF |
Far return |
Yes |
RETF = 0xCB
|
ROL |
Rotate left |
Yes |
ROL (register),(byte)
ROL (memory),(byte)
ROL (register),CL
ROL (memory),CL
|
ROR |
Rotate right |
Yes |
ROR (register),(byte)
ROR (memory),(byte)
ROR (register),CL
ROR (memory),CL
|
RSM |
Resume from system management |
Yes |
RSM = 0x0FAA
|
SAHF |
Store AH into flags |
Yes |
SAHF = 0x9E
|
SAL |
Shift arithmetic left |
Yes |
Same as SHL instruction. |
SAR |
Shift arithmetic right |
Yes |
SAR (register),(byte)
SAR (memory),(byte)
SAR (register),CL
SAR (memory),CL
|
SBB |
Subtraction with borrow |
Yes |
SBB (register),(register)
SBB (register),(memory)
SBB (memory),(register)
SBB (register),(immediate)
SBB (memory),(immediate)
|
SCASD SCASW SCASB |
Scan string |
Yes |
SCASD = 0xAF
SCASB = 0xAE
SCASW = 0x66AF
|
SETxx |
Conditionally set byte |
Yes |
SETxx (8-bit register)
SETxx (memory)
SETxx includes all of the following instructions:
SETE, SETZ, SETNE, SETNZ, SETLE, SETNG, SETGE, SETNL,
SETL, SETNGE, SETG, SETNLE, SETO, SETNO, SETS, SETNS,
SETNP, SETPO, SETP, SETPE, SETA, SETNBE, SETB, SETC,
SETNAE, SETBE, SETNA, SETNB, SETNC, and SETAE. |
SGDT |
Store GDT register |
Yes |
SGDT (memory) |
SHL |
Shift left |
Yes |
SHL (register),(byte)
SHL (memory),(byte)
SHL (register),CL
SHL (memory),CL
|
SHLD |
Shift left double precision |
Yes |
SHLD (register),(register),(byte)
SHLD (memory),(register),(byte)
SHLD (register),(register),CL
SHLD (memory),(register),CL
|
SHR |
Shift right |
Yes |
SHR (register),(byte)
SHR (memory),(byte)
SHR (register),CL
SHR (memory),CL
|
SHRD |
Shift right double precision |
Yes |
SHRD (register),(register),(byte)
SHRD (memory),(register),(byte)
SHRD (register),(register),CL
SHRD (memory),(register),CL
|
SIDT |
Store IDT register |
Yes |
SIDT (memory) |
SLDT |
Store LDT register |
Yes |
SLDT (register)
SLDT (memory) |
SMSW |
Store machine status word |
Yes |
SMSW (register)
SMSW (memory) |
STC |
Set carry flag |
Yes |
STC = 0xF9 |
STD |
Set direction flag |
Yes |
STD = 0xFD |
STI |
Set interrupt flag |
Yes |
STI = 0xFB |
STR |
Store task register |
Yes |
STR (register)
STR (memory)
|
SUB |
Subtraction |
Yes |
SUB (register),(register)
SUB (register),(memory)
SUB (memory),(register)
SUB (register),(immediate)
SUB (memory),(immediate)
|
TEST |
Bitwise compare |
Yes |
TEST (register),(register)
TEST (register),(memory)
TEST (register),(immediate)
TEST (memory),(immediate)
|
UD2 |
Undefined instruction |
Yes |
UD2 = 0x0F0B
|
VERR |
Verify segment for reading |
Yes |
VERR (16-bit register)
VERR (memory)
|
VERW |
Verify segment for writing |
Yes |
VERW (16-bit register)
VERW (memory)
|
WAIT |
Wait |
Yes |
WAIT = 0x9B
|
WBINVD |
Writeback and invalidate cache |
Yes |
WBINVD = 0x0F09
|
WRMSR |
Write to MSR |
Yes |
WRMSR = 0x0F30
|
XADD |
Exchange & add |
Yes |
XADD (register),(register)
XADD (memory),(register)
|
XLATB |
Table lookup translation |
Yes |
XLATB = 0xD7
|
XOR |
Bitwise exclusive OR |
Yes |
XOR (register),(register)
XOR (register),(memory)
XOR (memory),(register)
XOR (register),(immediate)
XOR (memory),(immediate)
|
If an instruction isn't on this list at all, it probably isn't supported.
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