
#ifndef  _X86_REGS_H_
#define _X86_REGS_H_

typedef enum
{
    NO_REG=0,
	
    X86_EAX,X86_EBX,X86_ECX,X86_EDX,X86_ESI,X86_EDI,X86_EBP,X86_ESP,
	
    X86_CS,X86_SS,X86_DS,X86_ES,X86_FS,X86_GS,
	
	X86_EFLAGS,

    X86_CR0,X86_CR1,X86_CR2,X86_CR3,X86_CR4,
	
    X86_DR0,X86_DR1,X86_DR2,X86_DR3,X86_DR4,X86_DR5,X86_DR6,X86_DR7,
	
	X86_GDTR_BASE,X86_GDTR_LIMIT,
	X86_IDTR_BASE,X86_IDTR_LIMIT,
	X86_LDTR,X86_TR,

	X86_TR3,X86_TR4,X86_TR5,X86_TR6,X86_TR7,
	
	Nx86REGS,
	
	XREGS=100,
    X86_AX,X86_BX,X86_CX,X86_DX,X86_SI,X86_DI,X86_BP,X86_SP,
	NXREGS,
		
	BREGS=110,
    X86_AL,X86_BL,X86_CL,X86_DL,
    X86_AH,X86_BH,X86_CH,X86_DH,
	NBREGS,
	MMREGS=120,
	X86_MM0, X86_MM1, X86_MM2, X86_MM3, X86_MM4, X86_MM5, X86_MM6, X86_MM7,
	NMMREGS,
	XMMREGS=130,
	X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7,
	NXMMREGS
	
} X86_Register;

#define Nx86_DEFINED_REGS   NMMREGS

#define Nx86_REGULAR_REGS	X86_EFLAGS
#define Nx86_GPR_REGS		X86_CS
#define Nx86_SEGMENT_REGS	Nx86_REGULAR_REGS-Nx86_GPR_REGS

#define X86_FIRST_SEGMENT   X86_CS
#define X86_LAST_SEGMENT	X86_GS

/* Float stack */
typedef enum
{
    X86_ST=0,X86_ST1=1,X86_ST2,X86_ST3,
	X86_ST4, X86_ST5,  X86_ST6,X86_ST7,
	Nx87REGS
} X86_Stack;      

/* Float Status */
typedef enum
{
	FPCW = 0,
	FPSW,
	FPTAG,
	FPIP_OFF, FPIP_SEL,
	FPOPCODE,
	FPDP_OFF, FPDP_SEL,
	Nx87STATUS
} X86_Status;


#endif /* _X86_REGS_H_ */




