Main Index
mentalSPICE Help Contents

Introduction---What is SPICE?

Using mentalSPICE with SuperCAD

Reference

Detailed description of the SPICE netlist, spice circuit elements, and analysis types

Technical Support


mentalSPICE Reference

The SPICE Netlist

Spice Circuit Components

Spice Analysis and Support Commands

Models Included with mentalSPICE

Books on SPICE


Books on SPICE

Here is a list of four books on SPICE:

1) Rashid, Muhammad H., Spice for Circuits and Electronics Using PSPICE ®, Second Edition, Prentice Hall, 1995

2) Vladimirescu, Andrei, The SPICE Book, John Wiley & Sons, Inc., 1994

3) Rashid, Muhammad H., SPICE for Power Electronics and Electric Power, Prentice Hall, 1993

4) Tuinenga, Paul W., SPICE: A guide to Circuit Simulation & Analysis Using PSPICE ®, Prentice Hall, 1995, 1992, 1988


Technical Support

Technical support can be obtained by contacting Mental Automation at:

5415 136th Place SE

Bellevue WA 98006

(206) 641-2141

(206) 649-0767 (FAX)

http://www.mentala.com


Introduction

SPICE analog circuit simulators allow you to develop and checkout a circuit design before you actually build it. SPICE stands for Simulation Program with Integrated Circuit Emphasis and traces its origins to the University of California at Berkeley. With the schematic editor, SuperCAD, you can draw up a circuit schematic and click over Analog Simulation... in the UTILITIES menu and thereby run the SPICE simulation. After the simulation, SuperCAD reloads the schematic, and you can then probe various signals using the scope popout display. The whole process is easy and completely automatic, and it is done entirely within the SuperCAD environment. You are free to treat your design as though it were implemented on a virtual breadboard, which you can test using virtual instruments (such as the oscilloscope display). You can easily alter portions of the circuit or make corrections and then re-run the simulation to see the effects. Using a 386 or greater machine with a hard disk, the process of changing the circuit and seeing the result can be measured in seconds for a small to medium sized circuit.

mentalSPICE is Mental Automation's version of Berkeley SPICE, version 3F5.

mentalSPICE is great at checking out circuits such as the following:

 filters

 oscillators

 amplifiers

 power circuits

 transmission lines

You can simulate anything that is made up out of passive components (resistors, inductors, or capacitors) or active discretes (transistors, diodes, etc.). You can also simulate circuits that include ICs which have models. The models are generally available from IC manufacturers such as National, TI, and Motorola; in addition mentalSPICE comes with models for common opamps.

The latest version of mentalSPICE now includes models for basic digital circuits so that you can also do limited digital simulation as well as mixed mode (both analog and digital) simulation. If you have need for a lot of digital simulation capability, the SuperSIM digital simulator is available as an add-on to SuperCAD.


Using mentalSPICE with SuperCAD

mentalSPICE is an add-on module to the schematic editor SuperCAD. To run mentalSPICE, you must have SuperCAD both to draw the circuit being simulated and to view the circuit waveforms which are output from the simulation.

The operation of SuperCAD with mentalSPICE is described in the following topics:

Preparation of Schematic for Simulation

Referencing and Using External IC Models

Referencing and Using External Semiconductor Models

Running and Viewing the Simulation Results

Virtual Signal Generators and Power Sources

Virtual Voltmeters and Ammeters

Examples

Troubleshooting


Troubleshooting

Sometimes mentalSPICE may fail to produce an output file. The first indication of this is the message:

Can't find signal X in buffer

where X is the signal name (usually the node number). This message occurs when you try to display the output with the oscilloscope. If this happens, look in the file ERROR.DOC for more information; this file will be in the same subdirectory as your SPICE schematic. You should also look in the .OUT file, if one is produced.

Depending on the nature of the problem noted in the files, there are several things you should do:

Check the schematic for obvious problems, such as missing connections & components

Check for correct component values

Check for correct units

If a node number is noted in the messages in the file, this is a good place to look on the schematic.

Sometimes SPICE fails to reach a solution, even when everything looks OK on the schematic. Convergence is a known problem under some circumstances---see one of the Books on SPICE. Another cause for failure is lack of good initial conditions for the circuit--this is especially true in circuits like oscillators. You can use the .IC statement to initialize nodes to a known value, or (if you have capacitors), use the IC parameter in the value field.


Examples

The following is a list of the ready-to-run examples included with mentalSPICE. To do the SPICE simulation, just load the given example schematic into SuperCAD and click on Analog Simulation.... Click on the YES button in the dialog that appears (the examples are already setup). When the simulation completes, as indicated by a message box, look at the results using the oscilloscope display.

Filename              Description (ANALYSIS)

555OSC.PIC         LM555 Oscillator example (TRAN)

555SHOT.PIC      LM555 One-shot circuit example (TRAN)

556OSC.PIC         LM556 Oscillator example (TRAN)

556SHOT.PIC      LM556 One-shot circuit example (TRAN)

74TTL.PIC           Low-powered TTL inverter circuit (TRAN)

ASTABLE.PIC     Transistor astable multivibrator example (TRAN)

BUTTER.PIC       Butterworth filter using the LM741 opamp (AC)

DIFFERNT.PIC    Differentiator opamp circuit (TRAN)

DIFFPAR.PIC       Differential pair example (DC)

ECL.PIC               ECL gate (TRAN)

ELLIP_5.PIC        5-pole elliptical filter circuit (AC)

INTEGRT.PIC      Integrator opamp circuit (TRAN)

RC.PIC                  Simple RC circuit (TRAN)

RLC.PIC                RLC circuit (AC)

RCA3040.PIC       Opamp model (AC)

RECTIFR.PIC       Diode rectifier circuit (TRAN)

SAWTH.PIC         Sawtooth waveform generator (mixed mode) circuit example (TRAN)

SHIFT.PIC            3-bit circular shift register (mixed mode) digital circuit example (TRAN)

UA709.PIC           Transistor model of UA709 opamp circuit (AC)

UA741.PIC           Transistor model of UA741 opamp circuit (TRAN)

XMISS.PIC           Transmission line example (TRAN)


Virtual Voltmeters and Ammeters

You can measure the DC voltages at various points in a circuit by doing an Operating Point Analysis (.OP) and by connecting the voltmeter part (VMETER) to those points. After running the SPICE analysis, the meters are updated with the voltage values, as in the following example:

To measure AC current through a branch you can insert the AMMETER symbol:

In this example, the current signal name (as seen in the SPICE output file and in the oscilloscope signal label) is V3#.


Virtual Signal Generators & Power Sources
Virtual Signal Generators and Power Sources

mentalSPICE uses special signal and power source library parts. These are shown below. To use the parts, access them by clicking on the library button and placing them on the schematic; wire the terminals to the appropriate places.

Function Generator (FUNGEN)

This part can be used to specify various time waveforms, including sinusoidal, piecewise linear, pulse, and  frequency modulated signals. To select one of the signal types just double click over the part. This will bring up the following dialog:

Click on the appropriate button to select a signal type. This will bring up a setup dialog, as well as select one of the four possible symbols:

sinewave

piece-wise linear

pulse

FM

AC Sweep Generator

This part is used as the signal source in the frequency (AC) analysis of a circuit

DC Power Supply

This part is used to specify a DC power source. To specify the power voltage level, double-click on the part and enter the voltage as the value.


Preparation of Schematic for Simulation

SPICE simulation using SuperCAD works best with small to medium-complexity analog circuits which can fit on a single sheet. You can work with multiple sheets but you may have to switch from one sheet to another to view different signals. The steps for preparing a schematic for simulation are as follows:

a) Draw the schematic----be sure you use parts that correspond to the SPICE built-in parts (transistors, diodes, etc.) or those in  SPICE libraries.

b) Give all parts component values by using the VALUE operation in the AUX menu. If you don't have enough room for a value, use the append statement, as in the following example:

#&V1 SIN 0 3.1 500KHZ

c) Label circuit nodes with number labels   (1,2,3....). Any node with the ground symbol on it becomes part of node 0 when the netlister is  run. If you do not number a node, the SuperCAD netlister will automatically number it, starting with index 100.

d) Provide a circuit input stimulus---For transient simply place the FUNGEN (function generator) symbol on the schematic and wire it to the input point. Double click over the part to set it up with the appropriate signal waveform (sine, pulse, piece-wise linear, or FM) For AC analysis, place the SWEEPGEN  (sweep generator) part on the schematic and wire it to the circuit input.  For DC analysis, use the voltage source symbol (VOLTS).

e) Mark all signals to be probed (traced) in the simulation by using the MARK operation in the DISPLAY pulldown menu. You first have to click over MARK and then click over any  signal which is to be probed (you can remove a signal by clicking so that the asterisk disappears).

f) If you need to measure AC current in a branch, insert the AMMETER symbol there. If you run a transient analysis, the current waveform will be automatically displayed (signal name: Vn#, where n is the reference number of the symbol).

g) Add any SPICE special commands (such as the .IC command or .MODEL command ) to the schematic using the text operation; these commands should be preceded by the # character.

The current version of SuperCAD and the netlister only allow one kind of primary analysis at a time, which is selected using  the mentalSPICE setup menu:

a) .TRAN (timing analysis)

b) .AC (AC frequency analysis)

c) .DC (DC characteristics analysis)

c) .OP (operating point analysis)

You can easily change the analysis type by changing the information in the setup menu and doing some changes with the signal generators in your schematic.

The following shows an example of a SPICE simulation schematic (low-pass filter, using an LM124):

This example is set up for frequency analysis (as indicated by the presence of the input sweep generator). +5-volt power is supplied to the opamp through use of the power supply symbol. Note that the model for the opamp resides in the ANALOG.MOD file.

The resulting  frequency plot on the oscilloscope display is as follows:

Important note for .TRAN analysis: Keep all transient times (fall times and rise times) larger than the step time used in the simulation set up dialog. You should typically use transient times which are at least 2 or 3 times longer than the step time. Doing this allows SPICE to avoid computational problems.


Referencing and Using External IC Models

mentalSPICE comes with models for many standard library parts. These include parts in the Analog library, Harris Semiconductor parts, Generic (74xxx) parts, and CMOS parts. To use these models you simply place the corresponding symbol on the schematic. All of the models reside in .MOD files, whose root name is the same as the corresponding symbol sub-directory. For example, the LM324 model is in the ANALOG.MOD file, since the LM324.PIC symbol file is in the ANALOG subdirectory of the SuperCAD library. Parts whose symbols are located in the SuperCAD  LIB sub-directory are put in the SPICE.MOD file.

See Models Included with mentalSPICE for a list of the IC models.

You can also add new custom or vendor-supplied Integrated Circuit (IC) Models. To do this, you simply put the given model information in one of the .MOD files, located in the SuperCAD library sub-directory. If necessary you can create a new .MOD file---just use the name of an existing library part sub-directory where the SuperCAD symbol exists. You can use NOTEPAD or a similar ASCII editor to append a new model file into the given .MOD file.

Usually vendor supplied models do not reflect the actual pinout of IC packages; so some work is needed to map the model pinout to real-world packages. Most models from National Semiconductor, for instance, use a 5-pin standard pinout  To convert one of these, a header is added to the model such as in the following:

.SUBCKT LM258 1 2 4 5 6 7 8

XA 3 2 8 4 1 LM258X

XB 5 6 8 4 7 LM258X

.

.

.SUBCKT LM258X 1 2  99 50 28

[body of model]

.

.

.ENDS LM258X

.ENDS

The LM258X referenced is the original vendor model. You also have to add an extra .ENDS statement to the end of the model.

Note that SPICE requires all IC designators to be X type. To accomodate this, the SuperCAD netlister automatically prefaces all the IC U type designators with an X. For example U12 becomes XU12.

Note that some massaging of vendor supplied models may be necessary to make them compatible with a SPICE3 simulator such as mentalSPICE.  The primary massaging is automatic----the translation of the SPICE2 poly statements in many of the models is accomplished in the netlister. The translation currently handles all poly(1) and poly(2) cases and the low order poly(n) cases where n>2.


Referencing and Using External Semiconductor Models

You can make use of custom or vendor-supplied semiconductor models. To do this you simply put the given model information in the SEMICON.MOD file, located in the SuperCAD sub-directory. You can use NOTEPAD or a similar ASCII editor to append a new model file.

To reference a model, give the semiconductor symbol on your schematic a value whose name is the model name. For example, in the following

the value 2N5089 can refer to the model statement in SEMICON.MOD as listed below:

.model 2N5089   NPN(Is=5.911f Xti=3 Eg=1.11 Vaf=62.37 Bf=1.434K Ne=1.421

+               Ise=5.911f Ikf=15.4m Xtb=1.5 Br=1.262 Nc=2 Isc=0 Ikr=0 Rc=1.61

+               Cjc=4.017p Mjc=.3174 Vjc=.75 Fc=.5 Cje=4.973p Mje=.4146 Vje=.75

+               Tr=4.671n Tf=822.3p Itf=.35 Vtf=4 Xtf=7 Rb=10)

Semiconductor models for any diode or transistor can be placed in the SEMICON.MOD file.


Running and Viewing the Simulation Results

Once the schematic is prepared (see Preparation of Schematic for Simulation), you can run the simulation by clicking over Analog Simulation... in the UTILITIES menu , and a dialog box will appear, as follows:

Click on the SETUP button to establish the duration of the simulation and other items:

Once you start the operation, the current schematic is saved, SuperCAD is temporarily suspended, and the netlister is run. The netlister produces a SPICE netlist file with the name of the current schematic as the root name and the extension .CIR. This is read by mentalSPICE and the simulation proceeds. After a delay which depends on the complexity of the simulation, SuperCAD becomes active again. You can now view the latest simulation results by clicking over the DISPLAY menu and then clicking over the SCOPE function. This brings up the oscilloscope display window. Signals which are marked in the schematic are automatically loaded and displayed. You can move the window over the circuit, so that it doesn't obscure the signals of interest, by dragging over the title bar. To change the display of a specific signal, click over one of the four trace labels and then click over any marked signal on the schematic. Marked signals are indicated by a "*" suffix. Up to 200 samples per channel are loaded from the trace buffer file on disk when a given signal is accessed.

Note that the maximum viewable signal level is 327 in absolute magnitude (32768/100). Also the minimum detectable signal change that the oscilloscope can see is 10 millivolts; this is at the .1 volts/div setting. This range of display should be satisfactory for most  cases, but if it is not, you can generally adjust the level of signal sources to accommodate it.

To read signal amplitudes in both display channels at a given point, the readout cursor is used; this is the vertical line in the scope display. To read a value, simply drag the line left or right with the mouse. When the left mouse button is released, the signal values are printed on the dialog line. For DC and TRAN analysis, the units are in volts. For AC analysis the units are decibels or degrees.

The "m" key is used to select loading of either phase values or magnitudes from the .OUT file; both values are generated automatically when you do an AC analysis.

Gain values for each channel are automatically selected based on the peak signal level of signals loaded from the .OUT file. The units used (volts, decibels, and degrees/div) are likewise read from the file.

For more information on displaying waveforms you can also see the topic: Oscilloscope Display.


Oscilloscope Display

This display window is accessed by clicking over the SCOPE menu item in the DISPLAY menu of SuperCAD, and allows you to view one to four channels of waveforms. The SCOPE window is shown below:

The waveforms can be obtained from disk files produced by a Spice analog simulator.  The window can be moved by dragging over the window title bar. Control over the timebase of the scope is accomplished by clicking over the TIME button. The direction of the time-scale magnification or contraction is specified by the direction control button; this is the square button to the right of the TIME button, and it is labeled either with a + or a -. If the direction control button displays +, then each click increases the time per division, otherwise(when the direction control button displays -), it decreases the time. You change direction by simply clicking over the direction control button. Likewise, the offset and gain of each scope channel are controlled by clicking over the associated buttons and using the direction control button to control increase or decrease. The offset button is marked with the letter "O", while the gain button (immediately to the left of the "O" button) is marked with the current gain. The gain setting can be adjusted in 9 steps ranging from .1 units/division to 50 units/division, where "units" can be volts, db, or phase degrees depending on the type of SPICE analysis.

To display a signal in the window, first click over one of the four trace labels in the window; these are initially specified as "trace 1" through "trace 4" in the display. Then, click over a node number in the schematic; the node has to be marked with an asterisk ("*"), and you have to have a display output file that was generated from the given schematic by the spice simulator.

To view different portions of a wave form, use the scroll bar or the scroll arrows.

Note that you can read out the time of a specific point in a wave form by using the readout cursor. This cursor consists of a vertical line which can be moved by using the mouse and dragging the center point either left or right within the display window. The time at the horizontal position of the cursor is displayed at the bottom of the screen on the prompt line. Also the amplitude of each channel is displayed.

If you are doing an AC analysis of a circuit, both phase and magnitude traces are generated and stored in the SPICE display file. To select which trace is loaded when you click over the marked node number, the "m" key is used. The default selection is magnitude; if you push the "m" key once, phase is selected, and pushing it again returns to a selection of magnitude.

You can obtain a screen dump of the oscilloscope window by clicking over the PRINT button.


Timebase Button

Use to step time base units.


Print Button

Use to print display area.


Scrollbar Control

Use to scroll waveform display.


Up/Down Control

Use to control direction of gain step or timebase step.


Gain Control Button

Use to step gain units.


Offset Control

Use to move waveform up or down.


Label Field

Shows name of signal; click on to access new signal.


The SPICE Netlist

mentalSPICE accepts text (ASCII) files which have an extension .CIR. The netlist files are produced automatically from the SuperCAD schematic editor when you load a schematic and click on Analog Simulation... in the Utilities menu. Note that the netlist files can be edited and viewed by any ASCII editor such as Notepad.

The general format of  a SPICE netlist is as follows:

Title

[netlist body]

.END

For example:

*SPICE NET

R1 1 2 1K

C1 2 0 1PF

R2 2 3 1K

C2 3 0 1UF

.TRAN 50US 10MS

VIN 1 0 PULSE 0 1 .1MS .1MS .1MS 5MS 10MS

.PRINT TRAN V(1) V(2) V(3)

.END

The netlist body  describes the circuit layout and includes model parameters and SPICE analysis controls. The order of the lines in the netlist body is arbitrary, except where continuation lines are used. A line may be continued by entering a + (plus) in the first column of the following line.

Each component in the circuit is specified by a netlist line that contains the component name, the circuit nodes to which the component is connected, and the values of the parameters that determine the electrical characteristics of the component.  The first letter of the component name specifies the component type. Details of each type of device are described in the section. Spice Circuit Components.

Fields on a line are separated by one or more blanks, a comma, an equal ('=') sign, or parentheses. Added spaces are ignored.

A name field must begin with a letter (A through Z) and can contain only  letter and number characters.

A number field may be an integer field, a floating point field, either an integer or floating point number followed by an integer exponent (for example, 2e-12 or 1.23e3), or either an integer or a floating point number followed by one of the following scale factors:

F = 10 e-15

G = 10 e9

K = 10 e3

M = 10 e-3

Meg = 10 e6

Mil = 25.4 e-6

N = 10 e-9

P = 10 e-12

T= 10 e12

U = 10 e-6

Letters immediately following a number that are not scale factors are ignored, and letters immediately following a scale factor are ignored.

Nodes names in mentalSPICE must be a number, e.g. 1, 2, 3. The SuperCAD netlister will automatically provide node number names (starting at 100), if a node is unnamed in the schematic. Also, nodes which are attached to the ground symbol (GND) are automatically placed on node "0"; node 0 is used exclusively for grounds.


SPICE Circuit Elements
SPICE Circuit Components

This section lists circuit components used in SPICE analysis. For each component, the general format of the SPICE netlist statement is provided, along with examples. Note that the netlist statement is automatically produced from a schematic by the SuperCAD netlist utility. The letter in parenthesis is the reference designator letter. The strings name1, name2, and name3 in the component descriptions represent arbitrary alphanumeric strings of up to seven characters. Fields that are enclosed in brackets ("[ ]") are optional.

Resistors (R)

Capacitors (C)

Inductors (L)

Mutual Inductors (K)

Independent Sources (V or I)

Linear Voltage-Controlled Current Sources (G)

Linear Current-Controlled Voltage Sources (H)

Linear Voltage-Controlled Voltage Sources (E)

Linear Current-Controlled Current Sources (F)

Non-linear Dependent Sources (B)

Transmission Lines (T)

Junction Diodes (D)

Bipolar Junction Transistors (Q)

Junction Field-Effect Transistors(J)

MOSFETs (M)

Switches (S)

Subcircuits (X)


Subcircuit Elements
Subcircuit Components

Netlist statement:

Xname1 Nl [N2 N3 ... ] SUBNAM

Examples:

Xl 2 4 17 3 1 MULTI

Subcircuits are used in SPICE by specifying pseudo-components beginning with the letter X, followed by the circuit nodes to be used in expanding the subcircuit To define a subcircuit use the Subcircuit Commands.


Subcircuit Commands (.SUBCKT and .ENDS)

To define a subcircuit use the following general form:

.SUBCKT command

[body of subcircuit]

.ENDS command

The body of the subcircuit consists of any valid SPICE netlist statements.  There is no limit on the size or complexity of subcircuits, and subcircuits may contain other subcircuits.

The .SUBCKT command is described as follows:

Netlist statement:

.SUBCKT subnam N1 [N2 N3              ... ]

Examples:

.SUBCKT OPAMP 1 2 3 4

A circuit definition is begun with a .SUBCKT line.  SUBNAM is the subcircuit name, and N1, N2,... are the external nodes, which cannot be zero.  The group of component lines which immediately follow the .SUBCKT line define the subcircuit.  The last line in a subcircuit definition is the ENDS line (see below).  Control lines may not appear within a subcircuit definition; however, subcircuit definitions may contain anything else, including other subcircuit definitions, device models, and subcircuit calls (see below).  Note that any device models or subcircuit definitions included as part of a subcircuit definition are strictly local (i.e., such models and definitions are not known outside the subcircuit definition).  Also, any component nodes not included on the SUBCKT line are strictly local, with the exception of 0 (ground) which is global.

The .ENDS command is described as follows:

Netlist statement:

.ENDS [SUBNAM]

Examples:

.ENDS OPAMP

The "Ends" line is the last line of a subcircuit definition.  The subcircuit name, if included, indicates which subcircuit definition is being terminated; if omitted, all subcircuits being defined are terminated.  The name is needed only when nested subcircuit definitions are being made.


Resistors

Netlist statement:

Rname1  Nl  N2  VALUE

Examples:

Rl  1  2  51

ROUT  16  19  20K

N1 and N2 are the two resistor nodes.  VALUE is the resistance in ohms and may be positive or negative but not zero.


Switches

Netlist statement:

Sname1  N+  N- NC+ NC- MODEL [ON] [OFF]

Examples:

S1 1 2 3 4 SWITCH1 ON

S2 5 6 3 0 SM2 OFF

N+ and N- are the nodes between which the switch terminals are connected. NC+ and NC- are the positive and negative controlling nodes. MODEL is the name of the switch model.

The switch model allows an almost ideal switch to be described. The switch is not quite ideal, since the resistance cannot change from 0 to infinity , but must have a positive value. By proper selection of the on and off resistances, they can be effectively zero and infinity relative to the other circuit elements. The parameters available are:

name	parameter	units	default

VT	threshold voltage	volts	0.0

VH	hysteresis voltage	volts	0.0

RON	on resistance	Ω	1.0

ROFF	off resistance	Ω	1/GMIN

It is recommended that the on and off resistances be set so they are just high or low enough to be negligible relative to other circuit elements. Otherwise, the SPICE simulator will have trouble producing an output.

Example model statement:

.MODEL SWX SW(RON=1 ROFF=1E+6 VT=1 VH=0)


Capacitors

Netlist statement:

Cname1  N+  N-  VALUE  [IC=INCOND]

Examples:

C12 13 0 lUF

COUT 17 19 10U  IC=4V

N+ and N- are the positive and negative capacitor nodes, respectively.  VALUE is the capacitance in Farads. The initial condition is the initial value of capacitor voltage in volts.  The initial conditions apply only if the UIC option is specified on the TRAN control line.


Inductors

Netlist statement:

Lname2  N+  N-  VALUE  [IC=INCOND]

Examples:

L3  5  6  1UH

LFILTER  10  17  20U IC=6.9MA

N+ and N- are the positive and negative inductor nodes, respectively.  VALUE is the inductance in Henries. The initial condition is the initial value of inductor current in amps that flows from N+, through the inductor, to N-.  The initial conditions apply only if the UIC option is specified on the TRAN analysis line.


Mutual Inductors

Netlist statement:

Kname1 Lname2 Lname3 VALUE

Examples:

K1 L1 L2 0.98

KTRANS Ll L2 0.791

Lname2 and Lname3 are the names of the two coupled inductors, and VALUE is the coefficient of coupling, K, which must be greater than 0 and less than or equal to 1.


Independent Sources

Netlist statement(s):

Vname1 N+ N- [[DC] DC/TRAN VALUE] [AC [ACMAG [ACPHASE]]]

Iname2 N+ N- [[DC] DC/TRAN VALUE] [AC [ACMAG [ACPHASE]]]

Examples:

V1  10  0  DC  6

V2  24  2  0.002 AC 1 SIN(0 1 1MEG)

I3  23  21  AC  0.345  45.0  SFFM(0 1  10K  5  1K)

VAMMETER 30 31

N+ and N- are the positive and negative nodes, respectively.  Voltage sources need not be grounded.  Positive current is assumed to flow from the positive node, through the source, to the negative node.  A positive current source forces current to flow out of the N+ node, through the source, and into the N- node.

Voltage sources, in addition to being used for circuit excitation, are the "ammeters" for SPICE:  zero valued voltage sources may be inserted into the circuit in order to measure current.  When used this way, they  have no effect on circuit operation because they represent short-circuits. Note that the special SPICE symbol, AMMETER, is a voltage source which can be used for this purpose.

DC/TRAN is the dc and transient analysis value of the source.  If the source value is zero both for dc and transient analyses, this value may be omitted.  If the source value is time-invariant (for example, in a power supply), then the value may  be preceded by the letters DC.

ACMAG is the ac magnitude and ACPHASE is the ac phase.  The source is set to this value in the ac analysis.  If ACMAG is omitted following the keyword AC, a value of unity is assumed.  If ACPHASE is omitted, a value of zero is assumed.  If the source is not an ac small-signal input, the keyword AC and the ac values are omitted.

Any independent source can be assigned a time-dependent value for transient analysis.  If a source is assigned a time-dependent value, the time-zero value is used for dc analysis.  There are five independent source functions: pulse, exponential, sinusoidal, piece-wise linear, and single-frequency FM.  If parameters other than source values are omitted or set to zero, the default values shown are assumed. (TSTEP is the printing increment and TSTOP is the final time (see the TRAN control line for explanation)).

Pulse

Sinusoidal

Exponential

Piece-Wise Linear

Single-Frequency FM


Pulse

Netlist statement:

PULSE(V1 V2 TD TR TF PW PER)

Example:

V1 3 0 PULSE(0 5 5NS 5NS 5NS 100NS 500NS)

parameter	default value	units

V1 (initial value)	Volts or Amps

V2 (pulsed value)	Volts or Amps

TD (delay time)	0.0	seconds

TR (rise time)	TSTEP	seconds

TF (fall time)	TSTEP	seconds

PW (pulse width)	TSTOP	seconds

PER(period)	TSTOP	seconds

A single pulse so specified is described by the following table:

time	value

0	VI

TD	VI

TD+TR	V2

TD+TR+PW	V2

TD+TR+PW+TF	VI

TSTOP	VI

Intermediate points are determined by linear interpolation.


Sinusoidal

Netlist statement:

SIN(VO VA FREQ TD THETA)

Examples:

VIN 3 0 SIN(0 1 100MEG 1NS lEl0)

parameters	default value	units

VO (offset)	Volts or Amps

VA (amplitude)	Volts or Amps

FREQ (frequency)	I/TSTOP	Hz

TD (delay)	0.0	seconds

THETA (damping factor)	0.0	I/seconds

The shape of the waveform is described by the following table:

time	value

0 to TD	VO

TD to TSTOP	VO + VA e-(t - TD)THETA sin(2 π FREQ (t + TD))


Exponential

Netlist statement:

EXP(V1 V2 TD1 TAU1 TD2 TAU2)

Examples:

V5 12 0 EXP(0 -3 20NS 50NS 200NS 100NS)

parameter	default value	units

V1 (initial value)	Volts or Amps

V2 (pulsed value)	Volts or Amps

TD1 (rise delay time)	0.0	seconds

TAU1 (rise time constant)	TSTEP	seconds

TD2 (fall delay time)	TD1+TSTEP	seconds

TAU2 (fall time constant)	TSTEP	seconds

The shape of the waveform is described by the following table:

time	value

0 to TD1	V1

TD1 to TD2	Vl+(V2-V1)[1-e-(t-TD1)/TAU1]

TD2 to TSTOP   	VI + (V2 - V1)[1-e-(t-TD1)/TAU1]+ (V1 - V2I)[1-e-(t-TD2)/TAU2]


Piece-Wise Linear

Netlist statement:

PWL(T1 Vl [T2 V2 T3 V3 T4 V4 ... ])

Examples:

V2 1 2 PWL(0 0 5 20NS 5 40NS 0 50NS)

Each pair of values (Ti, Vi) specifies that the value of the source is Vi (in Volts) at time=Ti.  The value of the source at intermediate time points is determined by using linear interpolation. The PWL statement can also be used for current sources. In this case, pairs (Ti, Ii) specify the values, where Ii is in Amps.


Single-Frequency FM

Netlist statement:

SFFM(VO VA FC MDI FS)

Examples:

Vl 12 0 SFFM(O lm 20K 5 1K)

parameter	default value	units

VO (offset)	Volts or Amps

VA (amplitude)	Volts or Amps

FC (carrier frequency)	1/TSTOP	Hz

MDI (modulation index)

FS (signal frequency)	ifrstop	Hz

The shape of the waveform is described by the following equation:

V(t)=VO + VA sin[2 π FC t + MDI sin(2 π FS t)]


Linear Voltage-Controlled Current Sources

Netlist statement:

Gname1 N+ N- NC+ NC- VALUE

Examples:

G14 0 5 0 1E-3

N+ and N- are the positive and negative nodes, respectively.  Current flow is from the positive node, through the source, to the negative node.  NC+ and NC- are the positive and negative controlling nodes, respectively.  VALUE is the transconductance (in mhos).


Linear Voltage-Controlled Voltage Sources

Netlist statement:

Ename1 N+ N- NC+ NC- VALUE

Examples:

El 5 3 7 1 2.0

N+ is the positive node, and N- is the negative node.  NC+ and NC- are the positive and negative controlling nodes, respectively.  VALUE is the voltage gain.


Linear Current-Controlled Current Sources

Netlist statement:

Fname1 N+ N- VNAM VALUE

Examples:

Fl 5 6 V13 5

N+ and N- are the positive and negative nodes, respectively.  Current flow is from the positive node, through the source, to the negative node.  VNAM is the name of a voltage source through which the controlling current flows.  The direction of positive controlling current flow is from the positive node, through the source, to the negative node of VNAM.  VALUE is the current gain.


Linear Current-Controlled Voltage Sources

Netlist statement:

Hname1 N+ N- VNAM VALUE

Examples:

H3 8 23 V11 2.5K

N+ and N- are the positive and negative nodes, respectively.  VNAM is the name of a voltage source through which the controlling current flows.  The direction of positive controlling current flow is from the positive node, through the source, to the negative node of VNAM.  VALUE is the transresistance (in ohms).


Non-linear Dependent Sources

Netlist statement:

Bname1 N+ N- [I=EXPR] [V=EXPR]

Examples:

Bl  0 1 I=sin(v(3))

B2  3 4 I=17

B3  0 12 V=exp(pi^i(v(4,5))

N+ is the positive node, and N- is the negative node.  The values of the V and I parameters determine the voltages and currents across and through the device, respectively.  If I is given, the device is a current source. If V is given, the device is a voltage source. Only one of these parameters can be used at a time.

The variable EXPR is an arbitrary function of the node voltages and currents in the circuit and can be a combination of the following elementary functions:

abs

acos

acosh

asin

asinh

atan

atanh

cos

cosh

exp

ln

log

sin

sinh

sqrt

tan


Transmission Lines

Netlist statement:

Tname1 Nl N2 N3 N4 ZO=VALUE [TD=VALUE] [F=FREQ [NL=NRMLEN]] + [IC=Vl, Il, V2, I2]

Example:

Tl  1  0  2  0  ZO=50  TD=10NS

1)  The transmission delay, TD, may be specified directly (as TD--10ns, for example).

2) A frequency F may be given, together with NL, the normalized electrical length of the transmission line with respect to the wavelength in the line at the frequency F. If a frequency is specified but NL is omitted, 0.25 is assumed (i.e., the frequency is assumed to be the quarter-wave frequency).

 Note that although both forms for expressing the line length are indicated as optional, one of the two must be specified.

This component models only one propagating mode.  If all four nodes are distinct in the actual circuit, then two modes may be excited.  To simulate such a situation, two transmission-line elements are required.

The  initial condition specification consists of the voltage and current at each of the transmission line ports.  Initial conditions apply only if the UIC option is specified on the TRAN control line.


Junction Diodes

Netlist statement:

Dname1 N+ N- MODNAME[AREA] [OFF] [IC=VD] [TEMP=T]

Examples:

D3  2  10  DIODE1

DCLMP  3  7  DMOD 3.0 IC=0.2

N+ is the positive node (anode), and N- is the negative nodes (cathode).  MODNAME is the model name, AREA is the area factor, and OFF indicates a starting condition on the device for dc analysis.  If the area factor is omitted, a value of 1.0 is assumed.  The initial condition specification using IC=VD is intended for use with the UIC option on the TRAN control line, when a transient analysis is desired starting from other than the quiescent operating point.  The TEMP value is the temperature at which this device operates, and overrides the temperature specification on the OPTION control line.


Bipolar Junction Transistors

Netlist statement:

Qname1 NC NB NE [NS] MODNAME [AREA] [OFF] [IC=VBE, VCE] [TEMP=T]

Examples:

Q23  10  24  13  QMOD IC=0.6, 5.0

Q50A  11  26  4  20  MOD1

NC, NB, and NE are the collector, base, and emitter nodes, respectively.  NS is the substrate node.  If unspecified, ground is used.  MODNAME is the model name, AREA is the area factor, and OFF indicates an  initial condition on the device for the dc analysis.  If the area factor is omitted, a value of 1.0 is assumed.  The initial condition specification using IC=VBE, VCE is intended for use with the UIC option on the TRAN control line, when a transient analysis is desired starting from other than the quiescent operating point.  See the IC control line description for a better way to set transient initial conditions.  The TEMP value is the temperature at which this device is to operate. and overrides the temperature specification on the OPTION control line.


Junction Field-Effect Transistors

Netlist statement:

Jname1 ND NG NS MODNAME [AREA] [OFF] [IC=VDS, VGS] [TEMP=T]

Examples:

J2 7 2 3 JMl OFF

ND, NG, and NS are the drain, gate, and source nodes, respectively.  MODNAME is the model name, AREA is the area factor, and OFF indicates an initial condition on the device for de analysis.  If the area factor is omitted, a value of 1.0 is assumed.  The initial condition specification, using IC=VDS, VGS is intended for use with the UIC option on the TRAN control line, when a transient analysis is desired starting from other than the quiescent operating point.  See the IC control line for a better way to set initial conditions.  The TEMP value is the temperature at which this device is to operate, and overrides the temperature specification on the OPTION control line.


MOSFETs

Netlist statement:

Mname1 ND NG NS NB MODNAME [L=VAL] [W=VAL] [AD=VAL] [AS=VAL] + [PD=VAL] [PS=VAL] [NRD=VAL] [NRS=VAL] [OFF] + [IC=VDS, VGS, VBS] [TEMP=T]

Examples:

Ml  24  2  0  20  TYPE1

M31  2  17  6  10  MODM L=5U W=2U

Ml  2  9  3  0  MOD1 L=10U W=5U AD=100P AS=100P PD=40U PS=40U

ND, NG, NS, and NB are the drain, gate, source, and bulk (substrate) nodes, respectively.  MODNAME is the model name.  L and W are the channel length and width, in meters.  AD and AS are the areas of the drain and source diffusions, in meters 2. Note that the suffix U specifies microns (1e-6 m) and P sq-microns (1e12 m2).  If any of L, W, AD, or AS are not specified, default values are used.  The use of defaults simplifies input file preparation, as well as the editing required if device geometries are to be changed.  PD and PS are the perimeters of the drain and source junctions, in meters.  NRD and NRS designate the equivalent number of squares of the drain and source diffusions; these values multiply the sheet resistance RSH specified on the MODEL control line for an accurate representation of the parasitic series drain and source resistance of each transistor.  PD and PS default to 0.0 while NRD and NRS to I.O. OFF indicates an initial condition on the device for de analysis.  The initial condition specification using IC=VDS, VGS, VBS is intended for use with the UIC option on the TRAN control line, when a transient analysis is desired starting from other than the quiescent operating point.  See the IC control line for a better and more convenient way to specify transient initial conditions.  The TEMP value is the temperature at which this device is to operate, and overrides the temperature specification on the OPTION control line.


Spice Analysis and Support Commands

Analysis Commands

DC Transfer Function (.DC)

Operating Point Analysis (.OP)

Small-Signal AC Analysis (.AC)

Transient Analysis (.TRAN)

Support Commands

Simulator Variables (.Options)

Set Initial Node Voltage (.NODESET)

Set Initial Conditions (.IC)

Output Command (.PRINT)

Model Statement (.MODEL)


Simulator Variables (.Options)

The options line allows the user set options for specific simulation purposes.

Netlist statement:

.OPTIONS OPT1 OPT2...             (or OPT=OPTVAL ...)

Examples:

.OPTIONS  TEMP=40  RELTOL=.003

Any combination of the following options may be specified, in any order. V denotes a positive number.

option	effect

ABSTOL=V	Resets the absolute current error tolerance of the program. The default value is 1 picoamp.

BADMOS3	Use the older version of the MOS3 model with the "kappa" discontinuity.

CHGTOL=V	Resets the charge tolerance of the program. The default value is 1.0e-14.

DEFAD=V	Resets the value for MOS drain diffusion area; the default is 0.0.

DEFAS=V	Resets the value for MOS source diffusion area; the default is 0.0.

DEFL=V	Resets the value for MOS channel length; the default is 100.0 micrometer.

DEFW=V	Resets the value for MOS channel width; the default is 100.0 micrometer.

GMIN=V	Resets the value of GMIN, the minimum conductance allowed by the program.

The default value is1.0e- 12.

ITLl=V	Resets the dc iteration limit.  'Me default is 100.

ITL2=V	Resets the dc transfer curve iteration limit.  The default is 50.

ITL4=V	Resets the transient analysis timepoint iteration limit. the default is 10.

KEEPOPINFO	Retain the operating point information when either an AC, Distortion, or

Pole-Zero analysis is run.  This is particularly useful if the circuit is large

and you do not want to run a (redundant) ".OP" analysis.

METHOD	Sets the numerical integration -method used by SPICE.  Possible

=name	names are "Gear" or "trapezoidal" (or just "trap").  The default is

trapezoidal.

PIVREL=V	Resets the relative ratio between the largest column entry and an acceptable

pivot value.  The default value is   1.0e-3. In the numerical pivoting algorithm

the allowed minimum pivot value is determined by:

EPSREL--AMAX I (PIVREL*MAXVAL, PIVTOL)

where MAXVAL is the maximum element in the column where a pivot is

sought (partial pivoting).

PIVTOL=V	Resets the absolute minimum value for a matrix entry to be accepted as a

pivot.  The default value is 1.0e-13.

RELTOL=V	Resets the relative error tolerance of the program.  The default value is 0.001 (0.1%).

TEMP=V	Resets the operating temperature of the circuit.  The default value is 27 deg C (300

deg K).  TEMP can be overridden by a temperature specification on any temperature

dependent instance.

TNOM=V	resets the nominal temperature at which device parameters are measured.  The default

value is 27 deg C (300 deg K).  TNOM can be overridden by a specification on any

temperature dependent device model.

TRTOL=V	resets the transient error tolerance.  The default value is 7.0. This parameter is an

estimate of the factor by which SPICE overestimates the actual truncation error.

TRYTOCOMPACT	Applicable only to the LTRA model. When specified, the simulator tries to

condense LTRA transmission lines' past history of input voltages and currents.

VNTOL=V	Resets the absolute voltage error tolerance of the program. The default value

is 1 microvolt.


Specify Initial Node Voltage Guesses (.NODESET)
Set Initial Node Voltage (.NODESET)

Netlist statement:

.NODESET V(N)=VALUE V(N)=VALUE

Examples:

.NODESET V(3)=13.23 V(5)=1.23

The .NODESET line helps the program find the dc or initial transient solution by making a preliminary pass with the specified nodes held to the given voltages.  The restriction is then released and the iteration continues to the true solution.  The NODESET line may be necessary for convergence on bistable or astable circuits. In general, this line only needs to be used in special circumstances.


Set Initial Conditions (.IC)

Netlist statement:

.IC V(N)=VALUE  V(N)=VALUE ...

Examples:

.IC V(1)=3  V(2)=-5.2

The IC line sets transient initial conditions. There are two interpretations of it as follows:

1) When the UIC parameter is specified on the TRAN line, then the node voltages specified on the IC control line are used to compute the capacitor, diode, BJT, and MOSFET initial conditions.  This is equivalent to specifying the IC=... parameter on each device line, but is much more convenient.  The IC=... parameter can still be specified and takes precedence over the IC values.  Since no dc bias (initial transient) solution is computed before the transient analysis, one should take care to specify all dc source voltages on the IC control line if they are to be used to compute device initial conditions.

2) When the UIC parameter is not specified on the TRAN control line, the dc bias (initial transient) solution is computed before the transient analysis.  In this case, the node voltages specified on the IC control line is forced to the desired initial values during the bias solution.  During transient analysis, the constraint on these node voltages is removed.  This is the preferred method since it allows SPICE to compute a consistent dc solution.

Do not confuse the IC line with the NODESET line.  The NODESET line is only to help dc convergence, and does not affect the final bias solution, except for multi-stable circuits.


Small-Signal AC Analysis (.AC)

The AC analysis of SPICE determines the small signal frequency response of a circuit. The analysis is performed from a starting frequency value to a final value.

Netlist statement:

.AC  DEC  ND  FSTART  FSTOP

.AC  OCT  NO  FSTART  FSTOP

.AC  LIN  NP  FSTART  FSTOP

Examples:

.AC  DEC  10  1  10K

.AC  DEC  10  1K  100MEG

.AC LIN  100  1  100HZ

AC  DEC  10  1K  10MEG

.AC  LIN  50  1 200HZ

DEC represents decade variation, and ND is the number of points per decade.  OCT represents  octave variation, and NO is the number of points per octave.  LIN represents linear variation, and NP is the number of points.  FSTART is the starting frequency, and FSTOP is the final frequency.  At least one independent source must have be specified with an ac value.


DC Transfer Function (.DC)

The DC analysis of SPICE determines the response of a circuit as a voltage or current source is swept over a given interval. During the analysis, capacitors are assumed to be open and inductors shorted.

Netlist statement:

.DC SRCNAM VSTART VSTOP VINCR [SRC2 START2 STOP2 INCR2)

Examples:

.DC V1  1.00  5.0  0.2

.DC V2  0  10  .5  V2  0  5  1

SRCNAM is the name of an independent voltage or current source. VSTART, VSTOP, and VINCR are the starting, final, and incrementing values respectively.   A second source (SRC2) can also be specified.  In this case, the first source is swept over its range for each value of the second source.  This is useful for obtaining semiconductor device output characteristics.


Operating Point Analysis (.OP)

The operating point analysis of SPICE determines the state of a circuit with only DC supplies applied. During the analysis, capacitors are assumed to be open and inductors shorted.

Netlist statement:

.OP

Note that a DC analysis is also automatically performed prior to a transient analysis to determine the transient initial conditions, and prior to an AC small-signal  analysis to determine the linearized, small-signal models for nonlinear devices.

Note: To view the results of the .OP analysis, load the circuits .OUT file with an ASCII editor such as NOTEPAD


Transient Analysis (.TRAN)

The transient analysis of SPICE determines the time response of a circuit. The inputs signals of the circuit can be time dependant functions including piecewise linear, pulse, sinusoidal, exponential and others.

Netlist statement:

.TRAN TSTEP TSTOP [TSTART [TMAX]] [UIC]

Examples:

.TRAN 1NS 10ONS

.TRAN 1NS 1000NS 500NS

.TRAN 10NS 1US

TSTEP is the printing increment for the print command output.  For use with the post-processor, TSTEP is the suggested computing increment.  TSTOP is the final time, and TSTART is the initial time.  If TSTART is omitted, it is assumed to be zero.  The transient analysis always begins at time zero.  In the interval [zero, TSTART], the circuit is analyzed (to reach a steady state), but no outputs are stored.  In the interval [TSTART, TSTOP], the circuit is analyzed and outputs are stored.  TMAX is the maximum step size that SPICE uses. By default, the program chooses the smaller of TSTEP or (TSTOP-TSTART)/50.0.  TMAX is useful to guarantee a computing interval which is smaller than the printer increment, TSTEP.

UIC (use initial conditions) is an optional keyword which indicates that the user does not want SPICE to solve for the quiescent operating point before beginning the transient analysis.  If this keyword is specified, SPICE uses the values specified using IC=... on the various components as the initial transient condition and proceeds with the analysis.  If the IC control line has been specified, then the node voltages on the IC line are used to compute the initial conditions for the devices.


Output Command (.PRINT)

Netlist statement:

.PRINT  TYPE  CV1  [CV2 ... CV8]

Examples:

.PRINT  TRAN  V(4)  V(15)

.PRINT  DC  V(2) V(18)

.PRINT  AC  V(2) VP(2)

The output command causes the listing of one to eight circuit variables in the SPICE output (.OUT) file. TYPE is the type of the analysis (DC, AC, or TRAN) for which outputs are desired. Note that the SuperCAD netlister automatically generates this statement based on marked nodes. Marked nodes are those shown on the schematic with numbers and an asterisk suffix (e.g., 2*, 34*).


Device Models

Netlist statement:

.MODEL MODNAME TYPE(PNAME1=PVALl PNAME2=PVAL2 ...)

Examples:

.MODEL MOD1 NPN (BF=50 IS=1e-13 VBF=50)

Simple circuit components typically require only a few parameter values.  However, some devices (especially, semiconductor devices) require many parameter values.  In a given circuit, many devices may be defined by the same set of device model parameters. In this case it is convenient to define a set of device model parameters in a separate MODEL line with a unique model name.  The devices can then refer to the model name.

MODNAME in the above is the model name, and TYPE is one of the following:

D	Diode model

NPN	NPN BJT model

PNP	PNP BJT model

NJF	N-channel JFET model

PJF	P-channel JFET model

NMOS	N-channel MOSFET model

PMOS	P-channel MOSFET model

Parameter values are defined by appending the parameter name followed by an equal sign and the parameter value.  Model parameters that are not given a value are assigned a default value. See the following for parameter definitions:

Diode Models

BJT Models (NPN/PNP)

MOSFET Models (NMOS/PMOS)

JFET Models (NJF/PJF)


BJT Models (NPN/PNP)

The bipolar junction transistor model in SPICE is based on the integral charge control model of Gummel and Poon.  This modified Gummel-Poon model extends the original model to include several effects at high bias levels.  The model automatically simplifies to the simpler Ebers-Moll model when certain parameters are not specified.  The parameter names used in the modified Gummel-Poon model have been chosen to be more easily understood by the program user. and to reflect better both physical and circuit design thinking.

The dc model is defined by the parameters IS, BF, NF, ISE, IKF, and NE which determine the forward current gain characteristics, IS, BR, NR, ISC, IKR, and NC which determine the reverse current gain characteristics, and VAF and VAR which determine the output conductance for forward and reverse regions.  Three ohmic resistances RB, RC, and RE are included, where RB can be high current dependent.  Base charge storage is modeled by forward and reverse transit times, TF and TR, the forward transit time TF being bias dependent if desired, and nonlinear depletion layer capacitances which are determined by CJE, VJE, and MJE for the B-E junction , CJC, VJC, and MJC for the B-C junction and CJS, VJS, and MJS for the C-S (Collector-Substrate) junction.  The temperature dependence of the saturation current, IS, is determined by the energy-gap, EG, and the saturation current temperature exponent, XTI.  Additionally base current temperature dependence is modeled by the beta temperature exponent XTB in the new model.  The values specified are assumed to have been measured at the temperature TNOM, which can be specified on the OPTIONS control line or overridden by a specification on the MODEL line.

The BJT parameters used in the modified Gummel-Poon model are listed below.

Modified Gummel-Poon BJT Parameters:

name	parameter	units	default	example

IS	transport saturation current	A	1.0e-16	1.0e-15

BF	ideal maximum forward beta	-	100	100

NF	 forward current emission coefficient	-	1.0	1

VAF	forward Early voltage	V	infinite	200

IKF	comer for forward beta

high current roll-off	A	infinite	0.01

ISE	B-E leakage saturation current	A	0	1.0e-13

NE	B-E leakage emission coefficient	-	1.5	2

BR	ideal maximum reverse beta	-	1	0.1

NR	reverse current emission coefficient	-	1	1

VAR	reverse Early voltage	V	infinite	200

IKR	corner for reverse beta

high current roll-off	A	infinite	0.01

ISC	B-C leakage saturation current	A	0	1.0e-13

NC	B-C leakage emission coefficient	-	2	1.5

RB	zero bias base resistance	Ω	0	100

IRB	current where base resistance

falls halfway to its min value	A	infinite	0.1

RBM	minimum base resistance

at high currents	Ω	RB	10

RE	emitter resistance	Ω	0	1

RC	collector resistance	Ω	0	10

CJE	B-E zero-bias depletion capacitance	F	0	2pF

VJE	B-E built-in potential	V	0.75	0.6

MJE	B-E junction exponential factor	-	0.33	0.33

TF	ideal forward transit time	sec	0	0.1ns

XTF	coefficient for bias dependence of TF	-	0

VTF	voltage describing VBC

dependence of TF	V	infinite

ITF	high-current parameter

for effect on TF	A	0

PTF	excess phase at freq=1.0/(TF*2PI) Hz	deg	0

CJC	B-C zero-bias depletion capacitance	F	0	2pF

VJC	B-C built-in potential	V	0.75	0.5

MJC	B-C junction exponential factor	-	0.33	0.5

XCJC	fraction of B-C depletion	-	1

capacitance connected to internal base node

TR	ideal reverse transit time	sec	0	l0ns

CJS	zero-bias collector-substrate

capacitance	F	0	2pF

VJS	substrate junction built-in potential	V	0.75

MJS	substrate junction exponential factor	-	0	0.5

XTB	forward and reverse beta

temperature exponent	-	0

EG	energy gap for temperature

effect on IS	eV	1.11

XTI	temperature exponent for effect on IS	-	3

KF	flicker-noise coefficient	-	0

AF	flicker-noise exponent	-	-	1

FC	coefficient for forward-bias

depletion capacitance formula	-	0.5

TNOM	Parameter measurement 	deg. C	27	50

temperature


Diode Model

The dc characteristics of the diode are determined by the parameters IS and N. RS is the resistance. Charge storage effects are modeled by a transit time, TT, and a nonlinear depletion layer capacitance which is determined by the parameters CJO, VJ, and M. The temperature dependence of the saturation current is defined by the parameters EG, the energy and XTI, the saturation current temperature exponent.  The nominal temperature at which these parameters were measured is TNOM, which defaults to the circuit-wide value specified on the OPTIONS control line.  Reverse breakdown is modeled by an exponential increase in the reverse diode current and is determined by the parameters BV and IBV (both of which are positive numbers).

Diode Parameters:

name	parameter	units	default	example

IS	saturation current	A	1.0e-14	1.0e-14

RS	ohmic resistance	Ω	0	10

N	emission coefficient	-	1	1.0

TT	transit-time	sec	0	0.lns

CJO	zero-bias junction capacitance	F	0	2pF

VJ	junction potential	V	1	0.6

M	grading coefficient	-	0.5	0.5

EG	activation energy	eV	1.11	1.11Si

0.69 Sbd

0.67 Ge

XTI	saturation-current temp. exp	-	3.0	3.0 jn

2.0 Sbd

KF	flicker noise coefficient	-	0

AF	flicker noise exponent	-	1

FC	 coefficient for forward-bias	-	0.5

depletion capacitance formula

BV	reverse breakdown voltage	V	infinite	40.0

IBV	current at breakdown voltage	A	1.0e-3

TNOM	parameter measurement	deg. C	27	50

temperature


MOSFET Models,

mentalSPICE provides several MOSFET device models, which differ in the formulation of the I-V characteristic.  The variable LEVEL specifies the model to be used:

LEVEL--1	Shichman-Hodges

LEVEL--2	MOS2

LEVEL--3	MOS3

The dc characteristics of the level 1 through level 3 MOSFETs are defined by the device parameters VTO, KP, LAMBDA, PHI and GAMMA.  These parameters are computed by SPICE if process parameters (NSUB, TOX, ...) are given, but user-specified values always override.  VTO is positive (negative) for enhancement mode and negative (positive) for depletion mode N-channel (P-channel) devices.  Charge storage is modeled by three constant capacitors, CGSO, CGDO, and CGBO which represent overlap capacitances, by the nonlinear thin-oxide capacitance which is distributed among the gate, source, drain, and bulk regions, and by the nonlinear depletion-layer capacitances for both substrate junctions divided into bottom and periphery, which vary as the MJ and MJSW power of junction voltage respectively, and are determined by the parameters CBD, CBS, CJ, CJSW, MJ, MJSW and PB.  Charge storage effects are modeled by the piecewise linear voltages-dependent capacitance model proposed by Meyer.  The thin oxide charge-storage effects are treated slightly different for the LEVEL=1 model.  These voltage dependent capacitances are included only if TOX is specified in the input description and they are represented using Meyer's formulation.

There is some overlap among the parameters describing the junctions, e.g. the reverse current can be input either as IS (in A) or as JS (in A/M2).  Whereas the first is an absolute value the second is multiplied by AD and AS to give the reverse current of the drain and source junctions respectively.  This methodology has been chosen since there is no sense in relating always junction characteristics with AD and AS entered on the device line; the areas can be defaulted.  The same idea applies also to the zero-bias junction capacitances CBD and CBS (in F) on one hand, and CJ (in F/m2) on the other.  The parasitic drain and source series resistance can be expressed as either RD and RS (in ohms) or RSH (in ohms/sq.), the latter being multiplied by the number of squares NRD and NRS input on the device line.

SPICE Level 1, 2, 3  Parameters:

name	parameter	units	default	example

LEVEL	model index	-	1

VTO	zero-bias threshold voltage(V-ro)	V	0.0	1.0

KP	transconductance parameter	A/V	2.0e-5	3.le-5

GAMMA	bulk threshold parameter ()	Vl/2	0.0	0.37

PHI	surface potential	V	0.6	0.65

LAMBDA	channel-length modulation

(MOS1 and MOS2 only) 	1/V	0.0	0.02

RD	drain ohmic resistance	0.0	0.0	1.0

RS	source ohmic resistance	 	0.0	1.0

CBD	zero-bias B-D junction capacitance	F	0.0	20fF

CBS	zero-bias B-S junction capacitance	F	0.0	20fF

IS	bulk junction saturation current (Is)	A	1.0e-14	1.0e- 15

PB	bulk junction potential	V	0.8	0.87

CGSO	gate-source overlap capacitance

per meter channel width	F/m	0.0	4.0e-11

CGDO	gate-drain overlap capacitance

per meter channel width	F/m	0.0	4.0e-11

CGBO	gate-bulk overlap capacitance

per meter channel length	F/m	0.0	2.0e-10

RSH	drain and source diffusion

sheet resistance	Ω/[]	0.0	10.0

CJ	zero-bias bulk junction bottom cap.

per sq-meter of junction area	F/M2	0.0	2.0e-4

MJ	bulk junction bottom grading coeff.	-	0.5	0.5

CJSW	zero-bias bulk junction sidewall cap.

per meter of junction perimeter	F/m	0.0	1.0e-9

MJSW	bulk junction sidewall grading coeff.	-	0.50(level 1)

0.33(level2, 3)

JS	bulk junction saturation current

per sq-meter of junction area	A/m2 	1.0e-8

TOX	oxide thickness	meter	1.0e-7	1.0e-7

NSUB	substrate doping	1/cm3	0.0	4.0e 1 5

NSS	surface state density	1/cm2	0.0	1.0el0

NFS	fast surface state density	1/cm2	0.0	1.0el0

TPG	type of gate material:	-	1.0

+1 opp. to substrate

-1 same as substrate

0 Al gate

XJ	metallurgical junction depth	meter	0.0	1µ

LD	lateral diffusion	meter	0.0	0.8µ

UO	surface mobility	cm2/Vs	600	700

UCRIT	critical field for mobility

degradation (MOS2 only)	V/cm	l.0e4	l.0e4

UEXP	critical field exponent in

mobility degradation (MOS2 only)	-	0.0	0.1

UTRA	transverse field coeff. (mobility)

(deleted for MOS2)	-	0.0	0.3

VMAX	maximum drift velocity of carriers	m/s	0.0	5.0e4

NEFF	total channel-charge (fixed and

mobile) coefficient (MOS2 only)	-	1.0	5.0

KF	flicker noise coefficient	-	0.0	10e-26

AF	flicker noise exponent	-	1.0	1.2

FC	coefficient for forward-bias

depletion capacitance formula	-	0.5

DELTA	width effect on threshold voltage

(MOS2 and MOS3)	-	0.0	1.0

THETA	mobility modulation (MOS3 only)	1/V	0.0	0.1

ETA	static feedback (MOS3 only)	-	0.0	1.0

KAPPA	saturation field factor (MOS3 only)	-	0.2	0.5

TNOM	parameter measurement temperature	deg..C	27	50

ND, NG, and NS are the drain, gate, and source nodes, respectively.  MODNAMEis the model name, AREA is the area factor, and OFF indicates an (optional) initial condition on the device for de analysis.  If the area factor is omitted, a value of 1.0 is assumed.  The (optional) initial condition specification, using IC=VDS, VGS is intended for use with the UIC option on the TRAN control line, when a transient analysis is desired starting from other than the quiescent operating point.  See the IC control line for a better way to set initial conditions.


JFET Models (NJF/PJF)

The JFET model is derived from the FET model of Shichman and Hodges. The dc characteristics are defined by the parameters VTO, BETA, LAMBDA and IS. VTO and BETA determine the variation of drain current with gate voltage. LAMBDA determines the output conductance. IS specifies the saturation current of the two gate junctions. Two ohmic resistances, RD and RS, are included.  Charge storage is modeled by nonlinear depletion layer capacitances for both gate junctions which vary as the -1/2 power of junction voltage and are defined by the parameters CGS, CGD, and PB.

JFET Parameters:

name	parameter	units	default	example

VTO	threshold voltage (VTO)	V	-2.0	-2.0

BETA	 transconductance parameter	A/V2	1.0e-4	1.0e-3

LAMBDA	channel-length modulation

parameter 	1/V	0	1.0e-4

RD	drain ohmic resistance	Ω	0	100

RS	source ohmic resistance	Ω	0	100

CGS	zero-bias G-S junction capacitance (Cgs)	F	0	5pF

CGD	zero-bias G-D junction capacitance (Cgs)	F	0	1pF

PB	gate junction potential	V	1	0.6

IS	gate junction saturation current (Is)	A	1.0e-14	1.0e-14

B	doping tail parameter	-	1	1.1

KF	flicker noise coefficient	-	0

AF	flicker noise exponent	-	-	1

FC	coefficient for forward-bias	-	0.5

depletion capacitance formula

TNOM	parameter measurement temperature	deg. C	27	50


Models Included with mentalSPICE

Models included with mentalSPICE are listed below.

Mixed-Mode Digital (TTL) Models---GENERIC.MOD

D7400	2-input NAND gate

D7402	2-input NOR gate

D7404	inverter

D7408	2-input AND gate

D7410	3-input NAND gate

D7411	3-input AND

D7417	open-collector hex buffer

D7420	4-input NAND gate

D7421	4-input AND gate

D7427	3-input NOR gate

D7428	2-input NOR gate

D7430	8-input NAND gate

D7432	2-input OR gate

D7440	4-input NAND gate

D7473	JK flip-flop

D7474	D flip-flop

D7486	XOR gate

D74112	JK flip-flop

Mixed-Mode Digital (CMOS) Models---CMOS.MOD

C4001	2-input NAND

C4002	4-input NAND

C4009	hex inverter

C4013	D flip-flop

C4023	3-input NAND

C4025	3-input NOR

C4027	JK flip-flop

C4049	inverter

C4050	buffer

C4070	2-input XOR gate

C4071	2-input OR gate

C4081	2-input AND gate

National Semiconductor Opamps---ANALOG.MOD

LM118	LM124	LM158	LM218	LM224	LM258

LM318	LM324	LM358	LM607	LM627	LM637

LM741	LM2902	LM2904	LM4250C	LM6118	LM6161

LM6162	LM6164	LM6165	LM6218	LM6261	LM6262

LM6264	LM6265	LM6361	LM63628	LM6364	LM6365

LM13600	LM13700	LM359	LM6685	LM111	LF155

LF156	LF157	LF255	LF256	LF257	LF351

LF353	LF355	LF356	LF357	LF400	LF411

LF412	LF441	LF441A	LF442	LF442A	LF444

LF444A	LF451	LF453

Other Analog Parts---ANALOG.MOD

LM555	Timer

LM556	Dual Timer

Harris Semiconductor Opamps---HARRIS.MOD

HA2510	HA2502	HA2500	HA2512	HA2520	HA2522

HA2539	HA2540	HA2541	HA2542	HA2544	HA2548

HA2600	HA2602	HA2620	HA2622	HA2839	HA2840

HA2841	HA2842	HA2850	HA5020	HA5101	HA5102

HA5104	HA5112	HA5114	HA5127	HA5137	HA5147

HA5190	HA5221	HA5222

TI Linear Parts---TI_LIN.MOD

LF347	LF412C	LM111	LM139	LM148	LM158

LM193	LM211	LM23	LM239	LM2900	LM2901

LM2902	LM2903	LM2904	LM311	LM324	LM339

LM339X2	LM348	LM3900	LM393	LM393	LP111

LP211	LP239	LP2901	LP311	LP339	LV2344

MC1458	MC1558	MC3303	MC3403	NE5532	NE5534

RC4136	RC4558	RV4136	RV4558	SE5534	TL022

TL031	TL032	TL034	TL051	TL052	TL054

TL061	TL062	TL064	TL070	TL071	TL072

TL074	TL081	TL082	TL084	TL2828	TL2829

TL331	TL393	TL714C	TLC1079	TLC139	TLC2201

TLC2202	TLC2262	TLC2264	TLC2274	TLC2354	TLC251

TLC252	TLC254	TLC25L2	TLC25L4	TLC271	TLC272

TLC274	TLC277	TLC279	TLC27L2	TLC27L4	TLC27L7

TLC27L9	TLC27M2	TLC27M4	TLC27M7	TLC27M9	TLC2801

TLC2810	TLC2872	TLC339	TLC352	TLC354	TLC3702

TLC3704	TLC371	TLC372	TLC393	TLE084	TLE1078

TLE2021	TLE2022	TLE2024	TLE2027	TLE2037	TLE2061

TLE2062	TLE2064	TLE2072	TLE2074	TLE2081	TLE2082

TLE2084	TLE2141	TLE2142	TLE2144	TLE2161	TLE2227

TLE2237	TLE2237	TLV1393	TLV2262	TLV2264	TLV2272

TLV2322	TLV2324	TLV2332	TLV2334	TLV2342	TLV2344

TLV2352	TLV2354	TLV2362	TLV2393	UA741

Analog Devices---ANADEV.MOD

AD515A	AD542	AD544	AD545A	AD546

AD547	AD548	AD549	AD705	AD707

AD744	AD795	AD797	AD810	AD811

AD840	AD841	AD844	AD847	AD848

AD849	AD8001A	AD8001AN	AD8001AR	AD8031

AD8531	AD9617	AD9618	AD9621	AD9622

AD9623	AD9624	AD9630	ADEL2020	BUF04

OP15	OP16	OP17	OP22	OP32

OP80	OP90	OP113	OP150	OP162

OX177	OP184	OP191	OP193

National Semiconductor Diodes---SEMICON.MOD

1N3064      1N4009      1N4148      1N4149      1N4150      1N4151

1N4152      1N4153      1N4154      1N4305      1N4446      1N4447

1N4448      1N4449      1N4454      1N4938      1N914        1N914A

1N914B      1N916       1N916A      1N916B

National Semiconductor Bipolar Transistors---SEMICON.MOD

MPSA05         MPSA06         MPSA10           MPSA18      MPSA20      MPSA42

MPSA43         MPSA55         MPSA56           MPSA70      MPSA92      MPSA93

MPSH10         MPSL01          MPSL51           MPSW01     MPSW01A  MPSW10

MPSW42        MPSW51        MPSW51A       MPSW55     MPSW56     MPS2924

MPS2925        MPS2926        MPS3392         MPS3393     MPS3395     MPS3638A

MPS3644        MPS3646        MPS3702         MPS3703     MPS3704     MPS3707

MPS3711        MPS3826        MPS3827         MPS390       MPS517       MPS651

MPS651          MPS651          MPS651           MPS6516     MPS6517     MPS6518

MPS6520        MPS652          MPS652           MPS652       MPS653       MPS6533

MPS6534        MPS6562        MPS6565         MPS656       MPS657       MPS809

MPS809          MPS859          PN2222            PN2222        PN2369        PN2369

PN2484           PN2906           PN2906A         PN2907        PN2907A     PN3565

PN3638           PN3638A        PN3640            PN3641        PN3642        PN3643

PN3644           PN3645           PN3646            PN3694        PN4121        PN4122

PN4141           PN4143           PN4248            PN4249        PN4250        PN4250

PN4258           PN4258A        PN4274            PN4275        PN4354        PN4355

PN4356           PN4916           PN4917            PN5128        PN5129        PN5133

PN5134           PN5135           PN5136            PN5137        PN5138        PN5139

PN5142           PN5179           PN5910            PN930          ST5771-1     TIS92

TIS93              TIS97              TIS98               TIS99           TN2219        TN2219

TN2905           2905A             TN4036            2N2712        2N2714        2N2923

2N2924           2N2925           2N3390             2N3391        2N3391        2N3392

2N3393           2N3394           2N3414             2N3415        2N3416        2N3417

2N3702           2N3703           2N3707             2N3711        2N3858        2N3859

2N3859           2N3860           2N3903             2N3904        2N3905        2N3906

2N4058           2N4061           2N4062             2N4123        2N4124        2N4125

2N4126           2N4286           2N4289             2N4291        2N4400        2N4401

2N4402           2N4403           2N4409             2N4410        2N4424        2N5086

2N5087           2N5088           2N5089             2N5172        2N5209        2N5210

2N5223           2N5224           2N5226             2N5227        2N5232        2N5232

2N5354           2N5355           2N5365            2N5366        2N5400         2N5401

2N5447           2N55               2N5551            2N5769        2N5771         2N5772

2N5817           2N5830

National Semiconductor JFET Transistors---SEMICON.MOD

J401               J402               J403               J404               J405             J406

J410               J411               J412               NDF9406      NDF9407     NDF9409

NDF9410       NF5101         NF5102          NF5103         NF5301       NPD5564

NPD5565       NPD5566      NPD8301       NPD8303      U257            U308

U309              U310             U401              U402             U403            U404

U405              U406             U440              U441             2N2608        2N2609

2N3370          2N3458         2N3459          2N3684         2N3685        J2N3686

J2N3687        J2N3821        J2N3822        J2N3823        J2N3824       J2N3921

J2N3922        J2N3954        N3954A        J2N3955         J2N3955A    J2N3956

J2N3957        J2N3958        J2N3966        J2N3967        J2N3970       J2N3971

J2N3972        J2N4084        J2N4091        J2N4092        J2N4093       J2N4117

J2N4117A     J2N4118        J2N4118A     J2N4119         J2N4119A    J2N4220

J2N4220A     J2N4221A     J2N4222        J2N4222A      J2N4223       J2N4338

J2N4339        J2N4340        J2N4341        J2N4381        J2N4391        J2N4392

J2N4393        J2N4416        J2N4416A     J2N4856        J2N4856A     J2N4857

J2N4857A     J2N4858        J2N4858A     J2N4859        J2N4859A     J2N4860

J2N4860A     J2N4861        J2N4861A     J2N5018        J2N5019        J2N5020

J2N5021        J2N5045        J2N5046        J2N5047        J2N5078        J2N5103

J2N5105        J2N5114        J2N5115        J2N5116        J2N5196        J2N5197

J2N5199        J2N5358        J2N5397        J2N5398        J2N5432        J2N5433

J2N5434        J2N5452        J2N5454        J2N5515        J2N5516        J2N5517

J2N5518        J2N5519        J2N5520        J2N5521        J2N5522        J2N5523

J2N5524        J2N5545        J2N5556        J2N5557        J2N5558        J2N5564

J2N5565        J2N5566        J2N5902        J2N5904        J2N5905        J2N5906

J2N5907        J2N5908        J2N5909        J2N5911        J2N5912        J2N6483

J2N6484        J2N6485