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Access to a SMDS network is via a dedicated digital facility < 45 Mbps (T3) from the Subscriber Access Terminal (SAT) through a generic interface known as the Subscriber Network Interface (SNI). Access typically is on the basis of a dedicated T1 facility at 1.544 Mbps or T3 at 44.736 Mbps, although access also is provided at 56/64 Kbps. Plans are to develop a SONET OC-3 interface, as well, operating at 155.520 Mbps [11-30]. Where direct access to a SMDS network is not available, access can be accomplished via Frame Relay network-to-network interface.
Distributed Queue Dual Bus (DQDB)
DQDB is the IEEE 802.6 standard which Bellcore adapted for SMDS access purposes. DQDB is based on a dual-bus architecture as illustrated in Figure 11.4. Each bus is unidirectional, carrying data in 53-octet cells. As the two busses act in concert, full-duplex (FDX) transmission is possible. In order to access the SMDS network, a reservation is placed on the upstream bus. Because the reserved time slots are presented on the downstream bus, the access unit , or DQDB engine, places data on those allocated time slots, which appear at intervals. The intervals of presentation are regular for delay-sensitive isochronous data, such as voice. The access network is implemented in a star topology, with each loop connected to a SMDS cell switch.
Figure 11.4 Distributed Queue Dual Bus (DQDB).
Subscriber Network Interface (SNI)
SNI is generic access over a dedicated link which can be DS-0 (56/64 Kbps), DS1 (1.544/2.048 Mbps) or DS3 (45/34 Mbps). The access configuration on the customer premise can support single or multiple CPE devices.
SMDS Interface Protocol (SIP)
SIP is a three-layer network access protocol, based on 802.6 and operating on the generic Subscriber Network Interface (SNI). SIP layers, which do not conform exactly to the OSI model, include the following:
The SIP segmentation process is similar to that described in the case of DQDB. The user PDU is encapsulated with SMDS-specific header and trailer information and is subsequently segmented into 53-octet cells. Each cell comprises 5 octets of control information and 48 octets of payload. At the receiving end, the process of reassembly reverses the segmentation process.
Data Exchange Interface (DXI)
DXI is a protocol developed by the SMDS Interest Group, dividing the SIP functions between a DSU and a host, bridge, or router. In a DXI implementation, SIP Levels 1 and 2 are based on the ISO HDLC protocol and operate on the bridge or router and the host. SIP Level 3 operates only on the DSU and the network, across the generic SNI. This approach speeds the acceptance of SMDS, as SIP can be added to a bridge or router via a software upgrade [11-30].
SIP Relay
SIP Relay provides Frame Relay Access as defined by the SMDS Interest Group. Where SMDS is not available, this approach allows SMDS connectivity via Frame Relay. SIP Relay provides encapsulation for SMDS Level 3 PDU, its transmission across a Frame Relay network, connection to an SMDS network, and delivery to a SMDS address. The process of final segmentation occurs at the point of Frame Relay/SMDS network interconnection.
As shown in Figure 11.5, and as discussed previously, customer DTE gains access to the SMDS network over a dedicated digital link that usually is in the form of a FT1, T1 or T3 circuit. The DTE can connect through a Subscriber Network Interface (SNI) that accommodates SIP Levels 1, 2, and 3 in collaboration with the network-based Switching System (SS). Alternatively, a DXI interface might support multiple DTE. The DXI interface splits SIP functionality between the host, bridge, or router and the DSU. Dual connections are made to the Distributed Queue Dual Bus (DQDB), consisting of an upstream and a downstream bus. The busses provide connection to a cell-based Switching System that resides in the LEC network. The various SSs are interconnected by Inter-Switching System Interfaces (ISSIs) in the form of high-capacity digital trunks. These trunks are intended to be SONET in nature, operating at OC-3 (155 Mbps) and above.
Figure 11.5 SMDS network. Source: TR-TSV-000772, Copyright © 1991, Bellcore. Reprinted with Permission.
The LEC Switching Systems are highly capable devices that can switch cells of data at very high speed on a connectionless basis. They contain buffers for flow control and are capable of making alternate routing decisions in the event that inter-switch trunks are congested. The SSs contain very high-speed internal busses, in the Gbps range, in order to accommodate multiple users operating at speeds < 45 Mbps.
The user data is presented to the network in the form of a Protocol Data Unit (PDU) which is < 9,188 octets in length (Figure 11.6). Such a PDU range accommodates virtually any native protocol, including SDLC. The DQDB protocol layer adds a header and trailer to the PDU, identifying the PDU as a data unit and providing an error control mechanism in the form of a 32-bit CRC. This Initial MAC PDU (Medium Access Control PDU) is then divided into 53-octet cells, known as Segmentation Units, which travel over time slots through the network.
Figure 11.6 SMDS segmentation and cell structure. Source: TR-TSV-000772, Copyright © 1991, Bellcore. Reprinted with Permission.
The structure of the SMDS slot is that of 53-octets, 48 octets are reserved for payload and the other 5 are overhead. The DQDB slot is divided into 2 segments, the Access Control field and the Segment field. The Access Control Field (1 octet) controls access to the bus. The Segment Field (52 octets) contains the Segment Header (4 octets), and the Segment Payload (48 octets), or user data.
Two types of SMDS slots are identified. Queued Arbitrated (QA) slots support asynchronous (non time-sensitive) data traffic. Pre-Arbitrated (PA) slots support isochronous traffic (voice and compressed video), which is delay-sensitive.
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